New LDMOS Model Delivers Powerful Transistor Library— Part 2: Library Applications

Last month, Part 1 of this article introduced the new CMC (Curtice/Modelithics/Cree) non-linear LDMOS FET transistor model. The CMC model was described, and its utility demonstrated by making extractions on a 1 watt wafer-probeable FET. In Part 2, this device is used as the core of a 30 watt model to show the scalability to larger devices. The 30 watt model is built up by adding appropriate package parasitics and thermal model parameters to a scaled version of the 1 watt cell model and then validated against linear and non-linear measurement data. A 19 element high power transistor library based on the CMC model is also explained. This library covers devices of various power levels up to 90 watts and frequencies over the DC to 2.7 GHz range. As an example of the good results that can be achieved with the new model library, a 60 watt UMTS band Doherty amplifier, employing the CMC UGF21030 LDMOS FET model, has been designed, achieving excellent efficiency and linearity simultaneously, with simulation-to-measurement agreement far exceeding that achieved with models available previous to the CMC.